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<channel>
	<title>EDA tools on Fedora while diving with the electrons</title>
	<atom:link href="http://chitlesh.wordpress.com/feed/" rel="self" type="application/rss+xml" />
	<link>http://chitlesh.wordpress.com</link>
	<description>This blog entails my contribution to the Fedora Project and some thoughts about the EDA/Semiconductor industry.</description>
	<lastBuildDate>Thu, 26 Nov 2009 07:53:27 +0000</lastBuildDate>
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		<title>EDA tools on Fedora while diving with the electrons</title>
		<link>http://chitlesh.wordpress.com</link>
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			<item>
		<title>[FEL]: Power Estimation at transistor Level</title>
		<link>http://chitlesh.wordpress.com/2009/11/26/fel-power-estimation-at-transistor-level/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/26/fel-power-estimation-at-transistor-level/#comments</comments>
		<pubDate>Thu, 26 Nov 2009 07:47:16 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[asic]]></category>
		<category><![CDATA[opencircuitdesign]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=716</guid>
		<description><![CDATA[One of the least advertised features of IRSIM is its ability to quickly estimate power of large VLSI circuits from gate level netlists (.sim).
To install IRSIM on Fedora (default on Fedora Electronic Lab):
# yum install irsim
This estimation is based on the

&#8216;three-level quantization scheme&#8217;, where the voltage can assume 3 values (GND, VDD/2 and VDD). It [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=716&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>One of the least advertised features of <a href="http://opencircuitdesign.com/irsim">IRSIM</a> is its ability to <em>quickly</em> estimate power of large VLSI circuits from gate level netlists (.sim).</p>
<p>To install IRSIM on Fedora (default on <a href="http://spins.fedoraproject.org/fel/">Fedora Electronic Lab</a>):</p>
<blockquote><p># yum install irsim</p></blockquote>
<p>This estimation is based on the</p>
<ul>
<li>&#8216;three-level quantization scheme&#8217;, where the voltage can assume 3 values (GND, VDD/2 and VDD). It is fairly more accurate than the &#8216;two-level rail-to-rail model&#8217;.</li>
<li>measurement of glitching power.</li>
<li>estimates reasonably close to those that can be derived by measuring currents with a SPICE simulator with an error of less than 20% and a speed up of about 500 times.</li>
<li>incremental power measurement.</li>
</ul>
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			<media:title type="html">Chitlesh</media:title>
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		<item>
		<title>[FEL]: Verilog::Language update to 3.222 on Fedora</title>
		<link>http://chitlesh.wordpress.com/2009/11/25/fel-veriloglanguage-update-to-3-222-on-fedora/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/25/fel-veriloglanguage-update-to-3-222-on-fedora/#comments</comments>
		<pubDate>Wed, 25 Nov 2009 20:52:50 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[fedora]]></category>
		<category><![CDATA[perl]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=708</guid>
		<description><![CDATA[






The perl-Verilog-Perl will now obsolete perl-Verilog as a result of a Fedora packaging naming convention.

Thanks to Wilson Snyder, the version 3.222 was just pushed to Fedora Testing repositories with the following bug fixes.


 Fix missing ; in ContAssign::verilog_text, bug177.  [Nicolas Wilhelm]
Fix multi-dimensional arrayed typedefs, bug183.  [Vesselin Kavalov]
 Fix &#8220;assert () else&#8221; action_blocks.  [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=708&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><div>
<div>
<div>
<div>
<div>
<div>
<div>
<div>The perl-Verilog-Perl will now obsolete perl-Verilog as a result of a Fedora packaging naming convention.</div>
<div></div>
<div>Thanks to Wilson Snyder, the version 3.222 was just pushed to Fedora Testing repositories with the following bug fixes.</div>
<div>
<ul>
<li> Fix missing ; in ContAssign::verilog_text, <a title="ContAssign verilog_text forget verilog separator (Closed)" href="http://www.veripool.org/issues/177" target="_blank">bug177</a>.  [Nicolas Wilhelm]</li>
<li>Fix multi-dimensional arrayed typedefs, <a title="SV unrecognized syntax: Multidimensioned typedef references (Closed)" href="http://www.veripool.org/issues/183" target="_blank">bug183</a>.  [Vesselin Kavalov]</li>
<li> Fix &#8220;assert () else&#8221; action_blocks.  [Vesselin Kavalov]</li>
<li> Fix typedef scoping under anonymous begin blocks.</li>
<li> Fix `define argument mis-replacing system task of same name, <a title="Define with formal matching $pli call gets misexpanded (Closed)" href="http://www.veripool.org/issues/191" target="_blank">bug191</a>.</li>
<li> Fix SystemPerl hitting &#8220;undefined find_interface&#8230;&#8221; in 3.220.</li>
<li> Fix erroring on strings with backslashed newlines, <a title="vppreproc doesn't parse strings with line continuation characters (Closed)" href="http://www.veripool.org/issues/168" target="_blank">bug168</a>. [Pete Nixon]</li>
<li> Fix compile error on RHEL3 with gettext, <a title="compile problem related to gettext on Linux (Closed)" href="http://www.veripool.org/issues/169" target="_blank">bug169</a>. [Marek Rouchal]</li>
<li> Fix line number miscounting with `pragma.</li>
<li>Add parsing of &#8220;assign&#8221;, including SigParser::contassign callback, Netlist::ContAssign object, and related accessors.</li>
<li> Several code speedups to vhier, Verilog::Netlist, and the parsers.</li>
<li> Add Preproc::getall to fetch all text instead of line-by-line.</li>
<li> Add Parser::new(use_cb_{name}=&gt;0) option to speed parsing.</li>
<li> Add SigParser/Netlist::new(use_vars=&gt;0) option to speed parsing.</li>
<li> Fix deep defines causing flex scanner overflows. [Brad Dobbie]</li>
<li> Fix preprocessing commas in deep parameterized macros. [Brad Dobbie]</li>
<li> Fix Preproc::defSubstitute not being called on parameterized macros.</li>
<li> Fix Perl 5.8.8 compile error, <a title="compile failures on multiple=">bug115</a>. [Marek Rouchal]</li>
</ul>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
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			<media:title type="html">Chitlesh</media:title>
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		<item>
		<title>Some Licenses kill opensource mechanical design flows</title>
		<link>http://chitlesh.wordpress.com/2009/11/24/some-licenses-kill-opensource-mechanical-design-flows/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/24/some-licenses-kill-opensource-mechanical-design-flows/#comments</comments>
		<pubDate>Tue, 24 Nov 2009 06:53:58 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[fedora]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=704</guid>
		<description><![CDATA[Electronic design is about design flows, rather than point software. Multiple software are needed for achievement multiple design flows.
However when one software breaks, the whole design flow becomes pointless. This is why we pay great attention to the design flows under the FEL collection.
For the real life, one might also need software for the mechanical [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=704&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>Electronic design is about design flows, rather than point software. Multiple software are needed for achievement multiple design flows.</p>
<p>However when one software breaks, the whole design flow becomes pointless. This is why we pay great attention to the design flows under the FEL collection.</p>
<p>For the real life, one might also need software for the mechanical body design. The current and widely used opensource mechanical design tool, OpenCascade suffer from <a href="https://bugzilla.redhat.com/show_bug.cgi?id=459125">licensing issues</a> with its redistribution. The OpenMoko design team uses <a href="http://code.google.com/p/heekscad/">Heekscad</a>. The latter requires a dependency on OpenCascade. Without OpenCascade in Fedora repositories, Heekscad will not pass Fedora package review.</p>
<p>This is a major blocker for anyone who wants to create a Fedora Spin for mechanical design. This licensing issue limits Fedora from shipping them.</p>
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			<media:title type="html">Chitlesh</media:title>
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		<item>
		<title>[FEL]: DIA for System Design and documentation</title>
		<link>http://chitlesh.wordpress.com/2009/11/21/fel-dia-for-system-design-and-documentation/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/21/fel-dia-for-system-design-and-documentation/#comments</comments>
		<pubDate>Sat, 21 Nov 2009 15:22:09 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[FEL]]></category>
		<category><![CDATA[artwork]]></category>
		<category><![CDATA[fedora]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=699</guid>
		<description><![CDATA[Dia is known to seduce some system level designers and is used to describe different block levels for embedded design.

Fedora has just received some additional shapes for digital blocks which will improve user documentation experience, through neat functional diagram drawn by dia. They should reach fedora repositories in a day or two.
Installation:
# yum install dia-Digital [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=699&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>Dia is known to seduce some system level designers and is used to describe different block levels for embedded design.</p>
<p style="text-align:center;"><a href="http://chitlesh.files.wordpress.com/2009/11/dia.png"><img class="aligncenter size-full wp-image-700" title="dia" src="http://chitlesh.files.wordpress.com/2009/11/dia.png?w=325&#038;h=243" alt="" width="325" height="243" /></a></p>
<p><a href="http://chitlesh.files.wordpress.com/2009/11/dia.png"></a>Fedora has just received some additional shapes for digital blocks which will improve user documentation experience, through neat functional diagram drawn by dia. They should reach fedora repositories in a day or two.</p>
<p>Installation:</p>
<blockquote><p># yum install dia-Digital dia-CMOS dia-electronic dia-electric2</p></blockquote>
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			<media:title type="html">Chitlesh</media:title>
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			<media:title type="html">dia</media:title>
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		<item>
		<title>Announcing Fedora Electronic Lab 12</title>
		<link>http://chitlesh.wordpress.com/2009/11/17/announcing-fedora-electronic-lab-12/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/17/announcing-fedora-electronic-lab-12/#comments</comments>
		<pubDate>Tue, 17 Nov 2009 15:40:24 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[FEL]]></category>
		<category><![CDATA[fedora]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=694</guid>
		<description><![CDATA[Hello there,
On behalf of Fedora Electronic Lab team, I have the pleasure to announce the fifth consecutive release of the Fedora Electronic Lab 12 Livedvd.
This Livedvd is available for immediate download.

This release highlights Fedora&#8217;s commitment in strengthening the electronic hardware communities with an advanced Electronic Design Automation (EDA) environment. The latter

was optimized to support OpenMoko [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=694&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>Hello there,</p>
<p>On behalf of Fedora Electronic Lab team, I have the pleasure to announce the fifth consecutive release of the <a href="http://chitlesh.fedorapeople.org/FEL/">Fedora Electronic Lab</a> 12 Livedvd.</p>
<p>This Livedvd is available for immediate <a href="http://spins.fedoraproject.org/fel#downloads">download</a>.</p>
<p><a href="http://chitlesh.files.wordpress.com/2009/11/felindex1.png"><img class="aligncenter size-full wp-image-696" title="felindex" src="http://chitlesh.files.wordpress.com/2009/11/felindex1.png?w=406&#038;h=188" alt="" width="406" height="188" /></a></p>
<p>This release highlights Fedora&#8217;s commitment in strengthening the electronic hardware communities with an advanced Electronic Design Automation (EDA) environment. The latter</p>
<ul>
<li>was optimized to support OpenMoko development team.</li>
<li>entails a peer review solution for hardware design.</li>
<li>has Eclipse 3.5 series for VHDL/Verilog IPCores development and documentation.</li>
<li>entails the latest gEDA/gaf release, openocd, simulators for 8051 microcontrollers,&#8230;</li>
<li>&#8230;.</li>
</ul>
<p>Please find in-depth details in the <a href="http://chitlesh.fedorapeople.org/papers/FEL12ReleaseNotes.pdf">Release Notes</a> and<a href="http://chitlesh.fedorapeople.org/papers/fel-flyer-f12.pdf"> Flyer</a>.</p>
<p style="padding-left:30px;"><a href="http://chitlesh.fedorapeople.org/FEL/">Website</a><br />
Mailing list : fedora-electronic-lab-list [AT] redhat DOT com<br />
<a href="https://fedorahosted.org/fedora-electronic-lab">Developers</a></p>
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	</item>
		<item>
		<title>[FEL]: xcircuit 3.6 series tagged as stable</title>
		<link>http://chitlesh.wordpress.com/2009/11/15/xcircuit-3-6-series-tagged-as-stable/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/15/xcircuit-3-6-series-tagged-as-stable/#comments</comments>
		<pubDate>Sun, 15 Nov 2009 23:54:59 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[FEL]]></category>
		<category><![CDATA[eda]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=689</guid>
		<description><![CDATA[Tim Edwards has tagged version 3.6 to stable, and version 3.7 is the new development version.
The stable release will only be updated with bug fixes, while all new development and experimental stuff will go into the development release.
Users will experience fast UI responses with the new stable release 3.6.163, which has just been pushed to [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=689&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>Tim Edwards has tagged version 3.6 to <em>stable</em>, and version 3.7 is the new development version.</p>
<p>The <em>stable</em> release will only be updated with bug fixes, while all new development and experimental stuff will go into the <em>development</em> release.</p>
<p>Users will experience fast UI responses with the new stable release 3.6.163, which has just been pushed to Fedora updates. This release also unleashes extra capabilities for managing big IC projects, which was lacking in the 3.4 series.</p>
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		<title>22nd Interop Forum:  1/3 of EDA software is pirated</title>
		<link>http://chitlesh.wordpress.com/2009/11/14/22nd-interop-forum-13-of-eda-software-is-pirated/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/14/22nd-interop-forum-13-of-eda-software-is-pirated/#comments</comments>
		<pubDate>Sat, 14 Nov 2009 15:54:41 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[eda]]></category>
		<category><![CDATA[events]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=687</guid>
		<description><![CDATA[Karen Bartleson reports some interesting facts from the 22nd EDA Interoperability forum in her blog.
Richard Paw represented the EDA Consortium’s OS Roadmap Committee. This group produces guidelines for operating system and hardware platforms that help unify EDA tool support around common platforms. (It drives customers crazy when the tools they purchase don’t support the same [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=687&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p><a href="http://synopsysoc.org/thestandardsgame">Karen Bartleson</a> reports some interesting facts from the <a href="http://www.synopsys.com/Community/Interoperability/Pages/InteropForumNov09.aspx">22nd EDA Interoperability forum</a> in her blog.</p>
<blockquote><p>Richard Paw represented the EDA Consortium’s <a href="http://bit.ly/1by09w" target="_blank">OS Roadmap</a> Committee. This group produces guidelines for operating system and hardware platforms that help unify EDA tool support around common platforms. (It drives customers crazy when the tools they purchase don’t support the same platforms.) The guidelines will be updated in September 2010. Added will be SLES 11 (SuSe Linux) and Windows 7. Dropped will be SLES 10. In 6 months, the committee will review Windows XP, Vista, and the upcoming RHEL 6 (RedHat Enterprise Linux).</p></blockquote>
<blockquote><p>Dave Graubart represented the EDA Consortium’s <a href="http://bit.ly/2pe8Kf" target="_blank">Anti-Piracy</a> Committee. He said it’s hard to feel the love when you’re getting ripped off. The committee estimates that 1/3 of all EDA software use worldwide is pirated or overused beyond the license agreements. Not scientific data, but troubling nevertheless for the EDA industry. It’s easy to find the stolen binaries so most of the 1/3 estimate comes from this, not misuse/overuse which is harder to find. There are potential techniques to help prevent this piracy and the committee will continue its work to solve the problem.</p></blockquote>
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		<title>[FEL] : Need more RPM packagers</title>
		<link>http://chitlesh.wordpress.com/2009/11/09/fel-need-more-rpm-packagers/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/09/fel-need-more-rpm-packagers/#comments</comments>
		<pubDate>Mon, 09 Nov 2009 20:10:15 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[FEL]]></category>
		<category><![CDATA[fedora]]></category>

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		<description><![CDATA[The Fedora Electronic Lab community needs MORE packagers as its userbase is growing release after release.
We are currently a small FEL team focussing on promoting opensource software in the world of Integrated Circuit design. Our userbase&#8217;s (Fedora,CentOS&#38;RHEL users) demand for proprietary alternatives is also proportional to our current success in effective opensource EDA software deployment.
Thereby, [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=681&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>The <a href="http://chitlesh.fedorapeople.org/FEL">Fedora Electronic Lab community</a> needs <strong>MORE packagers</strong> as its userbase is growing release after release.</p>
<p>We are currently a small FEL team focussing on promoting opensource software in the world of <a href="http://en.wikipedia.org/wiki/Integrated_circuit">Integrated Circuit</a> design. Our userbase&#8217;s (Fedora,CentOS&amp;RHEL users) demand for proprietary alternatives is also proportional to our current success in effective opensource EDA software deployment.</p>
<p>Thereby, we are seeking new contributors and RPM packagers to close <a href="https://fedorahosted.org/fedora-electronic-lab/report/3">our tickets</a> and  drive the FEL community forward.</p>
<p>Requirements:</p>
<ul>
<li>Packagers should be familiar with <a href="https://fedoraproject.org/wiki/Packaging/Guidelines">Fedora packaging guidelines/policies</a>.</li>
<li>We also need people to lead FEL.</li>
<li>Newbies are welcome as well (Mentoring will be provided).</li>
<li>Electronic design know-how is not required.</li>
</ul>
<p>I would appreciate if you could parse on this request to anyone who might be interested in joining the team.</p>
<p>Currently, the <a href="https://fedorahosted.org/fedora-electronic-lab/report/3">tickets</a> reflect Fedora-13&#8217;s feature list. If you are interested, please join in our <a href="http://www.redhat.com/mailman/listinfo/fedora-electronic-lab-list">mailing list</a>. Draft spec files are also provided to help you out for your basic RPM babysteps.</p>
<p>Other References</p>
<ul>
<li><a href="http://chitlesh.fedorapeople.org/papers/FEL12ReleaseNotes.pdf">FEL 12 Release Notes</a></li>
<li><a href="http://chitlesh.fedorapeople.org/papers/fel-flyer-f12.pdf">FEL 12 Flyer</a></li>
</ul>
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		<title>[FEL] Do you know this magic ?</title>
		<link>http://chitlesh.wordpress.com/2009/11/09/fel-do-you-know-this-magic/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/09/fel-do-you-know-this-magic/#comments</comments>
		<pubDate>Mon, 09 Nov 2009 18:17:53 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[FEL]]></category>
		<category><![CDATA[magic]]></category>

		<guid isPermaLink="false">http://chitlesh.wordpress.com/?p=677</guid>
		<description><![CDATA[Magic VLSI is one of the core FEL packages, with which IC layout can be carried out. Since Fedora is shipping 5 additional standard cells (delays calculated by a linear delay model, also known as the prop–ramp delay model), here is a small tip how to teach Magic to deduce the location of their respective [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=677&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><p>Magic VLSI is one of the core FEL packages, with which IC layout can be carried out. Since Fedora is shipping 5 additional standard cells (delays calculated by a linear delay model, also known as the prop–ramp delay model), here is a small tip how to teach Magic to deduce the location of their respective technology file:</p>
<ul>
<li>gedit ~/.magicrc</li>
<li>copy the following text into this ~/.magicrc file</li>
</ul>
<blockquote><p>puts stdout &#8220;Processing .magicrc file&#8221;<br />
path sys &#8220;. /usr/share/pharosc/magic/etc $CAD_ROOT/magic/sys $CAD_ROOT/magic/sys/current&#8221;</p></blockquote>
<ul>
<li>fire up magic, you should see in the Technology Manager, additional technologies.</li>
</ul>
<p>$CAD_ROOT variable is an Magic&#8217;s internal variable, which is /usr/lib or /usr/lib64 depending on your computer&#8217;s architecture.</p>
<p>The ~/.magicrc file can include any valid Tcl command. This file is also handy if the user wants to define a key shortcut or button actions. Names like &#8220;Control_XK_i&#8221; refer to key combinations. The &#8220;XK&#8221; comes from the X11 standard definitions.</p>
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		<title>[FEL]: PCB snapshot 20091103 as updates</title>
		<link>http://chitlesh.wordpress.com/2009/11/07/fel-pcb-snapshot-20091103-as-updates/</link>
		<comments>http://chitlesh.wordpress.com/2009/11/07/fel-pcb-snapshot-20091103-as-updates/#comments</comments>
		<pubDate>Sat, 07 Nov 2009 20:48:17 +0000</pubDate>
		<dc:creator>Chitlesh</dc:creator>
				<category><![CDATA[FEL]]></category>
		<category><![CDATA[pcb]]></category>

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		<description><![CDATA[Release Notes for PCB snapshot 20091103
This release represents almost 200 commits and as such this summary clearly is not complete.  See the ChangeLog file for the complete list of changes. This release was pushed to Fedora repositories. Users are advised to update their pcb installation to benefit those bugfixes and stability.
&#160;

 [feature] Add attributes to [...]<img alt="" border="0" src="http://stats.wordpress.com/b.gif?host=chitlesh.wordpress.com&blog=8235459&post=674&subd=chitlesh&ref=&feed=1" />]]></description>
			<content:encoded><![CDATA[<div class='snap_preview'><br /><div id=":h8"><a href="http://sourceforge.net/projects/pcb/">Release Notes for PCB snapshot 20091103</a><br />
This release represents almost 200 commits and as such this summary clearly is not complete.  See the ChangeLog file for the complete list of changes. This release was pushed to Fedora repositories. Users are advised to update their pcb installation to benefit those bugfixes and stability.
<p>&nbsp;</p>
<ul>
<li> [feature] Add attributes to layers</li>
<li>[bugfix]  Remove memory leak in attributes</li>
<li>[bugfix]  Avoid layer buttons getting confused (GTK)</li>
</ul>
<ul>
<li>[bugfix]  Fix dereference bug in hid_find_action()</li>
<li>[feature] Speed up some polygon operations</li>
<li> [bugfix]  Don&#8217;t let DRC change the grid setting</li>
<li>[bugfix]  Correct URL&#8217;s in some dialogs and output</li>
<li> [feature] Add filters to load file chooser dialog (GTK)</li>
<li> [bugfix]  Avoid segfaults with png HID with newer versions of libgd</li>
<li> [bugfix]  Don&#8217;t disperse locked elements</li>
<li> [feature] Added experimental topological autorouter</li>
<li> [feature] Added the beginning of a testsuite.</li>
<li> [docs]    Document FreeRotateBuffer()</li>
<li> [docs]    Add some additional notes on the usage of the existing autorouter</li>
<li> [feature] Add &#8211;png-bloat option</li>
<li> [bugfix]  Fix several bugs found with valgrind</li>
<li> [bugfix]  Improve the pre-install wrapper script</li>
<li><strong>[bugfix]  Several fixes to the autorouter</strong></li>
<li> [feature] Allow quoted strings and escaped characters in action arguments</li>
<li> [footprints] Add missing INDC3216M, remove duplicated RESC3216M</li>
<li>[feature] Added the ability to customize mouse events via gpcb-menu.res in the GTK HID.</li>
<li> [feature] Added the ability to use mod1 (alt)(option) in HIDs.  Useful on OSX.</li>
<li> [bugfix]  Fix compilation issues on centos</li>
<li> [bugfix]  Make the detection of tools and build system around building the documentation be more robust.  Users should not be worrying about &#8211;disable-doc or &#8211;enable-maintainer-mode anymore</li>
<li> [footprints] Add T018, T039, fix pinout of T092 to match JEDEC</li>
<li> [bugfix]  Speed up rendering of DRC violation previews under GTK</li>
<li> [bugfix]  Fix some crashing bugs related to polygons and thindraw mode</li>
<li> [feature] Added a DRC refresh button</li>
<li> [bugfix]  Fix some pango markup in the GTK DRC dialog</li>
<li> [bugfix]  Fix cursor warping on flipped boards (GTK)</li>
<li> [feature] Added preview images in the DRC violations window (GTK)</li>
<li> [feature] Add a DrcViolationType structure and add hooks to allow HID&#8217;s to use this</li>
<li> <strong>[bugfix]  Fix some polygon memory leaks</strong></li>
<li> [feature] Add an API for registering actions with a context to support scripting languages like GPMI.</li>
<li> [bugfix]  Fix a bug with the Report(NetLength) action and NULL pin/pad names</li>
<li> [bugfix]  Allow exporters to work with hairlines (width of 0)</li>
<li> [tools]   Increase autoconf version to 2.60 since we were using some features of it</li>
<li> [bugfix]  Fix a number of polygon related issues</li>
<li> [bugfix]  Fix a number of gcc warnings</li>
<li> [feature] Don&#8217;t display undocumented options in help output.  This helps the transition when deprecating an option.</li>
<li> [feature] Add outline mode for photo-mode exporting</li>
<li> [footprints] Put the mark on pin 1 for axial footprints to make them more likely to fall on grid</li>
<li> [bugfix]  Fix flipping of arcs</li>
<li> [bugfix]  Fix parsing of old-syntax arcs</li>
<li> [bugfix]  Include explicit text/lines on silk layers in the assembly drawing output</li>
<li><strong>[feature] &#8216;&#8211;ben-mode&#8217; has been renamed to &#8216;&#8211;photo-mode&#8217;</strong></li>
<li> [bugfix]  Fix some crashing bugs on boards with a large number of rats</li>
<li> [bugfix]  Fix an off-by-one bug in the GTK netlist window</li>
<li> [docs]    Add getting started guide</li>
<li> [feature] Add support for parsing suffixes on numbers (&#8220;um&#8221;, &#8220;mm&#8221;,&#8221;in&#8221;, &#8220;mil&#8221;)</li>
<li> [bugfix]  Fix some configure/build issues when cross compiling</li>
<li> [bugfix]  Fix some improperly used automake conditionals</li>
<li> [feature] Add additional crosshair shapes</li>
<li><strong>[fedora] Sub package -doc entails documentation in different file formats.</strong></li>
</ul>
</div>
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