Free Electronic Lab

Opensource EDA software development, some thoughts about the EDA/Semiconductor industry and Mixed-signal integrated circuit design

Netgen: back on track

Following my mail on “Fedora Electronic Lab”, DenisLeroy got netgen back on track and it’s being reviewed. Hopefully, it may be on time for F8.

Netgen does LVS checks, i.e. it verifies the Layout against the Schematic. The layout is created with Magic while the Schematic with Xcircuit. Both Magic and Xcircuit includes the required mechanisms to extract netlists. Thus netgen can compares the netlists. The netlists could be either of sim or spice. I’ve explained both below.

Example of Usage:
This is a simple NOR i.e:

magic -d OGL nor.mag & xcircuit nor2.ps &
ext
ext2sim -R -C OR ext2spice -R -C
Netlists -> Write Sim OR Netlists -> Write Spice

$ netgen &

readnet sim nor
readnet sim nor2
lvs nor nor2
readnet spice nor
readnet spice nor2
lvs nor nor2

Result: Circuits match uniquely.
LVS Done.

“reinitialize” should be used to restart another LVS check

Filed under: Uncategorized

EDA addon gds2pov being shipped by Fedora.

GDS2POV is a program to take a GDS2 layout file and output a POV-Ray scene description file of the GDS2 data. This allows the creation of attractive 3D pictures of a layout.

From now on, VLSI amateurs can create a 3D view of their layout with the proper technology on Fedora. They can use either magic or alliance (in the near future) to create GDS2 data out of their physical layout.

Example from the %doc:
gdsoglviewer -p example_process.txt -i example.gds P+ -c example_config.txt

In accordance to Wikipedia:
GDS II stream format, commonly known as GDSII is a database format, which in the integrated circuit industry has been the de facto standard for IC layout data exchange for more than two decades. Originally it was developed by Calma for that company’s layout design computer systems “Graphic Data System” (“GDS”) and “GDS II”. Now the format is owned by Cadence Design Systems.

Filed under: Uncategorized

Piklab: Troubleshooting your port to be detected

Read: /usr/share/doc/piklab-0.14.2/README.Fedora
(french) /usr/share/doc/piklab-0.14.2/LISEZMOI.Fedora

chitlesh(~)[1]$ piklab-prog –port-list
piklab-prog: version 0.14.2 (rev. distribution)
Detected ports:
- Serial Port: no port detected
- Parallel Port: no port detected
- USB Port: Vendor Id: 0x046D – Product Id: 0xC016

things to check out:
* settings in bios
* is modprobing a module required
* is firmware required (if yes, use piklab-prog –firmware-dir DIR)

or if you want to get your hand dirty and troubleshoot further, a C program:

int main() {
char* fname = “/dev/XXXXXXXX”;
int fd = open(fname, O_RDWR | O_NDELAY);
if (fd < 0) {
printf(“Cannot open …”);
} else {
printf(“OK”);
}
}

This URL might be useful as well.

Filed under: Uncategorized

A loss: there is no OpenSource LVS netlist comparison tool

Since a while I’ve been pushing some well known electronic tools, mostly for simulation and VLSI. And to my knowledge, Fedora is the only major distribution shipping some of those tools (magic, ngspice, alliance(soon).. to name a few). But one thing that I really need to complete my design flow with the opensource tools is a LVS netlist comparison tool.

With this tool, one can verify their netlists from a particular schematic editor (gschem or xcircuit) with their netlists from a layout editor such as magic.

There is netgen and it is open source. But however it crashes during its main functionality and serves no more use than wasting time.

%description
Netgen is a tool for comparing netlists, a process known as LVS, which stands for “Layout vs. Schematic”. This is an important step in the integrated circuit design flow, ensuring that the geometry that has been laid out matches the expected circuit.

The greatest need for LVS is in large analog or mixed-signal circuits that cannot be simulated in reasonable time. Even for small circuits, LVS can be done much faster than simulation, and provides feedback that makes it easier to find an error than does a simulation.
Since upstream didn’t reply to me and there is no other reason to let the netgen package review open, I’m thereby closing it and asked for CVS cleanups.

If you happen to know an opensource LVS (Layout Versus Schematic) netlist checker, just let me know.

There is gemini, but one has to ask to the author and distribution is forbidden.

Till now, I’m using the couple “diff” and “kompare” to do LVS checks.

Filed under: Uncategorized

Robotics on Fedora

Paul Osmialowski explained how he managed to do robotics on fedora.

Filed under: Uncategorized

sounds like I’ll give Alliance my icons :)

When one of my package doesn’t have an icon for its desktop file, I used to make that package require either redhat-artwork or fedora-logos. However this restricts one from creating his/her own respins without fedora-logos. Thus having such a dependency on the redhat-artwork or fedora-logos packages should be removed.

I have a set of pictures in my private collection, that I use in my kde menu.

I’m hoping that alliance developers could include those into the sources.

Thus, they might be used in other distributions as well:
* ubuntu packages which Julien Boucaron is building
* scientific linux
* …

Please, note that those 6 pictures are taken from my handy in my university lab and used krita for minor effects.

Artwork professionals might not consider them as icons, but at least those pictures can be used as icons and make alliance packaging more distro-independent.

Filed under: Uncategorized

$MANPATH

chitlesh(~)[0]$ man ls
No manual entry for ls

chitlesh(~)[0]$ man /usr/share/man/man1/ls.1.gz
OK!

Yet again, $MANPATH was overridden by one of my scripts.

Filed under: Uncategorized

From VHDL description to Layout

We will soon see Alliance VLSI CAD System into the Fedora Collection.

Have I mentioned Alliance VLSI CAD System was the SEYMOUR CRAY 1994 CONTEST winner, before ? Yes, this powerful opensource VLSI CAD System is up to the class.

GPL-based Alliance VLSI design system has been around for about twelve years and is in use by about 250 universities around the world. It includes simulation, synthesis, layout, design-rule checking, timing analysis and many utilities.

Alliance VLSI design system is a complete set of CAD tools for teaching VLSI design. Alliance aims at allowing universities to start and develop VLSI design activities without too much time and money investments. Each Alliance tool can operate as a standalone program as well as a part of the complete design framework.

The first time user might mixed up that which tool brought by Alliance VLSI CAD System does what. However all these are well documented in /usr/share/doc/alliance-doc-5.0/design-flow/index.html from the alliance-doc package.

I would personally recommended to spend an hour or two reading the documentations and the tutorials found at /usr/share/doc/alliance-doc-5.0/tutorials/ (available on the alliance-doc rpm)

/usr/share/doc/alliance-doc-5.0/overview.pdf
In /usr/share/doc/alliance-doc-5.0/tutorials
1. start.pdf
2. simulation.pdf
3. synthesis.pdf
4. place_and_route.pdf

The examples provided are simply outstanding. Do copy the /usr/share/doc/alliance-doc-5.0 directory to your home directory and try to “make” the examples. Some of them would even require one or hours for synthesis. :)

Below I described how I created the schematic and the layout of a 2 bit multiplexer from a VHDL description, just to familiarize myself before attacking an Operational Transconductance Amplifier (which I once did with Cadence of Mentor Graphics).

As for the automatic Schematic and Layout generation, it will surprise you. I’ve used the default technology in alliance, but one can even use his/her own technology.

All these may be simplified to one command “make”, in a Makefile.

Meanwhile, while alliance is still under review, you can try it:
* SRPM
* RPM (alliance i386) (alliance-doc i386)

Filed under: Uncategorized

how DamienDurand and I share something in common

Although our Desktop Environment differences, finally DamienDurand and I do share something in common, same spams!

Filed under: Uncategorized

gEDA/gaf 1.1.1-20070708 pushed to stable

The development snapshot of gEDA/gaf 1.1.1-20070708 was pushed to dist-fc7-updates a few minutes ago. The primary focus of this snapshot was to pick up some important bug fixes upon the 1.0.1-20070626 release.

Release notes:
http://geda.seul.org/devel/v1.1/1.1.1/gaf-1.1.1-relnotes.html

This release can be downloaded via yum for
* FC-6 (Zod)
* F-7 (Moonshine)
* rawhide.

Filed under: Uncategorized

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Chitlesh Goorah
Digital IC design engineer
Neuchâtel, Switzerland

This blog is featured on Sean Murphy's EDA blogger list.

June 2013
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