[FEL]: ngspice-23 stable release

ngspice-23 was released into Fedora and EPEL testing repositories with the following enhancements:

• New devices: HiSIM2 and HiSIM_HV models from Hiroshima University have been added.
• New features: transient noise simulation, a random voltage generator option trrandom and random telegraph noise added to independent voltage and current sources; command wrs2p to write a s-parameter file using Touchstone vers. 1 format.

Filed under: ngspice

[FEL]-ngspice- any simulator variable setting

Following the previous post, there is now an update of FEL’s ngspice (21-3.cvs20100719) available which allows users to set any simulator variable with an ‘option’ command, either in spinit or .spiceinit, or in a control section. Please see the updated manual for details.

$ rpm -qld ngspice | grep pdf

Courtesy of Holger Volt

Filed under: ngspice

ngspice: doubling of time steps with XSPICE

The ngspice package we maintain has been built with XSPICE enabled.

Users will experience a doubling of time steps (and cpu time) required during transient simulation compared to spice3f.

This is caused by the value of trtol, which is internally set to 1
(instead of standard 7).

So if you do not use XSPICE devices (named a…) or the poly option in
voltage sources, if

.option trtol=7

is set in the input file, users will gain a factor of two in speed.

Momentarily, there is no way to set this value in spinit or .spiceinit.

Courtesy of Holger Volt

Filed under: ngspice

[FEL]: Standard Cell characterisation – part one

Both xcircuit and ngspice has been updated for Fedora/EPEL-5 last week with some key features to boost productivity for standard cell characterisation. I’ll explain briefly in two blog posts, thus this one is the first post.

Last week, Fedora users have updated their ngspice rework 19 to rework 20 (20-1.fc12), with the following key highlights :

• Updated BSIM4 code to BSIM 4.6.5 in accordance to this document.
• Piecewise linear(PWL) functionality for B sources.
• Support of 5-terminal bjt’s in subckt’s by prepending subckt name (similar things should be made for 5-7 terminal mos transistors, like soi models).
• New measurement code, which is the most awaited feature for standard cell characterisation.

Currently the measurement code is still undocumented, so I hope this blog post will help ngspice users understand with their baby steps with ngspice’s .meas command. Though it follows the same syntax as HSpice, it still not yet complete. Hopefully the next ngspice releases will smooth the edges.

.meas command

Anyone who is characterising standard cells can now use .meas command and it surely helps to maintain an automatic flow.

For the sake of simplicity, I’ll cover a transient simulation as example, however one can also use it for voltage transfer characteristic of the cell.

.tran 0.1 18n uic

Define a parameter :

.param vp = 3.0v

Calculate maximum voltage of signal Vout from 4 ns to 10 ns

.meas tran vmax max v(Vout) from 4n to 10n

Calculate minimum voltage of signal Vout from 6 ns to 15 ns

.meas tran vmin min v(Vout) from 6n to 15n

Calculate the fall delay between the falling edge of the signal Vin and the falling edge of signal Vout. (note the use of parameter ‘vp’ here)

.meas tran delay_f trig v(Vin) val=’vp/2′ fall=1 targ v(Vout) val=’vp/2′ fall=1

Calculate the rise delay between the rising edge of the signal Vin and the rising edge of signal Vout. (note the use of parameter ‘vp’ here)

.meas tran delay_r trig v(Vin) val=’vp/2′ rise=1 targ v(Vout) val=’vp/2′ rise=1

These are the basic .meas commands which can be extended for ripple calculation and many of the user’s needs. The above image, created with ‘dia’, describes visually those commands.

Upon simulation, ngspice will output :

…

Transient Analysis

vmax                =  3.300000e+00 at=  1.000000e-08

vmin                =  2.589696e-04 at=  1.480631e-08

delay_f           =  4.780022e-10 targ=  1.052800e-08 trig=  1.005000e-08

pdelay_r           =  2.980831e-10 targ=  5.448083e-09 trig=  5.150000e-09

…

More examples can be found about the .meas command with

$  rpm -qld ngspice-doc | grep meas

Filed under: asic, eda, feature, fedora, Free Electronic Lab, ngspice

[FEL]: Circuit simulation improved

Paolo Nenzi, Dietmar, Holger Vogt and Robert Larice have contributed to the enhanced stability with the new ngspice rework 20 release. ngspice rework 20 has already been pushed to fedora stable repositories with the following enhancements:

• Model names can start with a number like 1N4001
• .global command reinstated (was disabled)
• Error messages now display line number of input deck
• [feature]: .measure with tran, ac and dc (not yet complete, e.g DERIV is missing)
• [feature]: sysinfo command added
• [device]: Updated bsim4 model to BSIM 4.6.5
• [device]: Added PWL functionality for B sources

Currently Holger Vogt is kindly looking after my variable instantiation feature request for the .measure command. Hopefully after some testing, we can push another release to the stable repositories so that fedora users can largely benefit from it as soon as possible. I will write another blog post to demonstrate how to use this small but valuable feature.

Al Davis, who is working behind gnucap, is considering system-c plugins for gnucap, probably without their run-time package. Gnucap provides a lot of the needed run time support already. It might be all that is needed is to map the interface. That said, we will have to update fedora gnucap package to the latest development snapshots with the help of Rakesh Pandit (current fedora gnucap maintainer). This will give fedora users the chance to use gnucap plugins and latest enhancements over the current 0.35 stable repositories. This deserves another blog post .

Arun Sag is working on pushing some emacs mode to the fedora repositories. Among these emacs modes, there are irsim-mode and and spice-mode (see the above screenshot). Many users will enjoy the look-and-feel on their fedora emacs. I’m taking the opportunity to remind Fedora users that irsim has stuck-at fault simulation and power estimation capabilities.

Filed under: eda, emacs, fedora, Free Electronic Lab, gnucap, ngspice