Free Electronic Lab

Opensource EDA software development, some thoughts about the EDA/Semiconductor industry and Mixed-signal integrated circuit design

Nedit’s Ctrl-y for emacs

Nedit has a very cool feature and I’ve even seen people using gvim have something similar. However emacs for some reason doesn’t. Is it because they don’t have users of their same field of application? Well who knows.

The feature in question that with Ctrl-y on Nedit one can open a file whose filename and path are listed in a text file just by placing the cursor on that
filename. e.g

#----------------------
#!/usr/bin/tclsh
source $(SCRIPTS_HOME)/definitions.tcl
....
#----------------------

After several nights roaming online for a possible solution with emacs, I ended thinking that there is no generic for this. Hence I ended up writing the following lisp code myself with my 4-hours experience with lisp.

The objective is there is an environmental variable for each projects’ path and that each has specific technology files (LEF,Liberty(ccs,ecsm,…) for pads, sram, rom, analog modules, …… One should be able to open the $(SCRIPTS_HOME)/definitions.tcl (with a shortcut i.e Ctrl-Y) within emacs itself , instead of ctrl-x-f ?

;;
;; Nedit file open with control-y
;;
(defun cgo-open-this-file (arg)
  "Copy lines (as many as prefix argument) in the kill ring"
  (interactive "p")

  ;; select whole word
  (let (b1 b2)
    (skip-chars-backward "^<>“[\"‘")
    (setq b1 (point))
    (skip-chars-forward "^<>”]\"’")
    (setq b2 (point))
    (set-mark b1))

  ;; grab selected word and start processing it
  (setq filename
        (if (and transient-mark-mode mark-active)
            (buffer-substring-no-properties (region-beginning) (region-end))
          (thing-at-point 'symbol)))

  ;; identify a environmentalvariable
  (setq envvar (replace-regexp-in-string ".*$(" "" filename))
  (setq envvar (replace-regexp-in-string ").*" "" envvar))
  (setq envvar (getenv envvar))
  (message "envvar %s" envvar)

  ;; replacing the environmental variable
  (setq envvar_replacement (replace-regexp-in-string "\$(.*)" envvar filename))
  (message "file %s" envvar_replacement)
  (find-file envvar_replacement)
)

;; optional key binding
(global-set-key "\C-y" 'cgo-open-this-file)

This code can be improved to support multiple env variables or any thing you would like, However it works and suits my application. Feel free to post a better solution :)

Filed under: eda, emacs

[FEL]: Standard Cell characterisation – part two

Xcircuit 3.6 series brings on technology library support, which enables anyone to maintain customed analog or digital IPs, independent of the schematic design. This powerful feature, coupled with ngspice, helps the designer to maintain their spice commands within the testbench schematic. It will automatically extracts the spice netlists with the subcircuits included, then from the tcl console simulate the design.

However this was not working out of the box and the user needed to patch ngspice. Since ngspice rework 17, Fedora’s ngspice was patched accordingly. But with ngspice rework 19, it broke. This week Holger Volgt improved the patch and merge it to ngspice cvs branch.

This blog post will briefly show a testcase about how to invoke ngspice within Xcircuit directly.

Launch Xcircuit and load your design. Here, I’ll take a simple invertor as example. Then launch the Tcl console from the file menu and type

::xcircuit::spice start

If you encounter this error, you are certainly using an older version of ngspice.

There is already an update in the fedora repositories which fixes this issue.

On the screenshot below, you can see the invertor in a test situation alongside spice commands for the simulation. Hence there is no need to maintain extra file or makefile to launch SPICE simulation. Everything is launched and saved by Xcircuit in a postscript format.

::xcircuit::spice start

(extracts the spice netlist and sets the initial condiction.)

::xcircuit::spice run

(executes the simulation)

::xcircuit::spice send “plot v(Vin) v(Vout)”

(sends the plot command to ngspice and displays the plot)

Arun SAG has recently filed a package review request for emacs-spice-mode. Once approved and pushed to Fedora repositories, you can execute spice simulations within emacs as well.

Filed under: asic, emacs, feature, fedora, Free Electronic Lab, IP, xcircuit

[FEL] Tip: Verilog lint with Emacs

Verilator has verilog lint capabilities aside its main robust functionality : Verilog code to C++/SystemC conversion.

# yum install verilator

$ verilator –lint-only mydesign.v

Coupled with verilog-mode, it can really boost productivity for the experienced designer just by adding the following to the .emacs file.

(setq verilog-linter “verilator –lint-only”)

Currently we are making a request to upstream so that vhdl-mode and verilog-mode bundled with emacs can be updated. Possibly this should be also be enabled by default.

Filed under: emacs, Free Electronic Lab, verilog

[FEL]: Circuit simulation improved

Paolo Nenzi, Dietmar, Holger Vogt and Robert Larice have contributed to the enhanced stability with the new ngspice rework 20 release. ngspice rework 20 has already been pushed to fedora stable repositories with the following enhancements:

  • Model names can start with a number like 1N4001
  • .global command reinstated (was disabled)
  • Error messages now display line number of input deck
  • [feature]: .measure with tran, ac and dc (not yet complete, e.g DERIV is missing)
  • [feature]: sysinfo command added
  • [device]: Updated bsim4 model to BSIM 4.6.5
  • [device]: Added PWL functionality for B sources

Currently Holger Vogt is kindly looking after my variable instantiation feature request for the .measure command. Hopefully after some testing, we can push another release to the stable repositories so that fedora users can largely benefit from it as soon as possible. I will write another blog post to demonstrate how to use this small but valuable feature.

Al Davis, who is working behind gnucap, is considering system-c plugins for gnucap, probably without their run-time package. Gnucap provides a lot of the needed run time support already. It might be all that is needed is to map the interface. That said, we will have to update fedora gnucap package to the latest development snapshots with the help of Rakesh Pandit (current fedora gnucap maintainer). This will give fedora users the chance to use gnucap plugins and latest enhancements over the current 0.35 stable repositories. This deserves another blog post :) .

Arun Sag is working on pushing some emacs mode to the fedora repositories. Among these emacs modes, there are irsim-mode and and spice-mode (see the above screenshot). Many users will enjoy the look-and-feel on their fedora emacs. I’m taking the opportunity to remind Fedora users that irsim has stuck-at fault simulation and power estimation capabilities.

Filed under: eda, emacs, fedora, Free Electronic Lab, gnucap, ngspice

FEL: Emacs, Verilog-mode, dinotrace

I have just pushed dinotrace to Fedora stable repositories. This will elevate the digital design experience for Emacs users.

Fedora users can soon install it with:

# yum install dinotrace emacs-dinotrace

I will briefly describe some features of this co-design possibility which dinotrace and verilog-mode provides on this blog post. However for more technical details, consult the manual.


1: Dinotrace is a waveform viewer which read .vcd files, generated by ghdl or iverilog. It includes a .el file for emacs which enables the designer to interact with the signals on dinotrace via emacs.

To load dinotrace-mode on emacs:
Alt-x dinotrace-mode

To load verilog-mode on emacs:
Alt-x verilog-mode

2: Verilog-mode provides designer with context-sensitive highlighting, auto indenting, and macro expansion capabilities to greatly reduce Verilog coding time. It also prevents additional human errors while coding. I will describe a few macro-expansion capabilities below.

3: Signal highlighting. Both Emacs and dinotrace can share the same colour to represent signals.

4: With annotation feature, the values of the signals with respect to the cursors’ position on the waveform viewer is annotated on the Emacs. This will help designers to debug their complex designs efficiently.

The above screenshot shows a simple frequency divider coded with verilog-mode macros and the same verilog after the macros were automatically expanded by Emacs. For more details about other macros, consult the verilog-mode manual. Happy design on Fedora.

Filed under: dinotrace, emacs, verilog

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Chitlesh Goorah
Digital IC design engineer
Neuchâtel, Switzerland

This blog is featured on Sean Murphy's EDA blogger list.

June 2013
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