Free Electronic Lab

Opensource EDA software development, some thoughts about the EDA/Semiconductor industry and Mixed-signal integrated circuit design

[FEL]: New stable release of perl-Verilog-Perl

Verilog-Perl 3.314(15926 – the PI version!) is released and pushed to Fedora and EPEL6 testing repositories.

Verilog::Language 3.314 2012/02/27 ChangeLog
- vhier –forest and –instance. [by John Busco]
- Fix expansion of back-slashed escaped macros, bug441. [Alberto Del Rio]
- Fix -F relative filename parsing, bug444. [Jeremy Bennett]
- Fix c style var array declarations. [by Jack Cummings]
- Fix –debug parsing after -f files, bug442. [Jeremy Bennett]
- Fix hang on recursive substitution `defines, bug443. [Alex Solomatnikov]

Filed under: Free Electronic Lab, perl, verilog

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Chitlesh Goorah
Digital IC design engineer
Neuchâtel, Switzerland

This blog is featured on Sean Murphy's EDA blogger list.

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