Free Electronic Lab

Opensource EDA software development, some thoughts about the EDA/Semiconductor industry and Mixed-signal integrated circuit design

From VHDL description to Layout


We will soon see Alliance VLSI CAD System into the Fedora Collection.

Have I mentioned Alliance VLSI CAD System was the SEYMOUR CRAY 1994 CONTEST winner, before ? Yes, this powerful opensource VLSI CAD System is up to the class.

GPL-based Alliance VLSI design system has been around for about twelve years and is in use by about 250 universities around the world. It includes simulation, synthesis, layout, design-rule checking, timing analysis and many utilities.

Alliance VLSI design system is a complete set of CAD tools for teaching VLSI design. Alliance aims at allowing universities to start and develop VLSI design activities without too much time and money investments. Each Alliance tool can operate as a standalone program as well as a part of the complete design framework.

The first time user might mixed up that which tool brought by Alliance VLSI CAD System does what. However all these are well documented in /usr/share/doc/alliance-doc-5.0/design-flow/index.html from the alliance-doc package.

I would personally recommended to spend an hour or two reading the documentations and the tutorials found at /usr/share/doc/alliance-doc-5.0/tutorials/ (available on the alliance-doc rpm)

/usr/share/doc/alliance-doc-5.0/overview.pdf
In /usr/share/doc/alliance-doc-5.0/tutorials
1. start.pdf
2. simulation.pdf
3. synthesis.pdf
4. place_and_route.pdf

The examples provided are simply outstanding. Do copy the /usr/share/doc/alliance-doc-5.0 directory to your home directory and try to “make” the examples. Some of them would even require one or hours for synthesis. :)

Below I described how I created the schematic and the layout of a 2 bit multiplexer from a VHDL description, just to familiarize myself before attacking an Operational Transconductance Amplifier (which I once did with Cadence of Mentor Graphics).

As for the automatic Schematic and Layout generation, it will surprise you. I’ve used the default technology in alliance, but one can even use his/her own technology.

All these may be simplified to one command “make”, in a Makefile.

Meanwhile, while alliance is still under review, you can try it:
* SRPM
* RPM (alliance i386) (alliance-doc i386)

About these ads

Filed under: Uncategorized

One Response

  1. Ashwith says:

    Many figures in the pdfs are blank. Am I missing some plugins or are these really missing? If you look at alliance-doc/tutorials/simulation.pdf for example, in page 6, the second box is blank. Both evince and acrobat reader show the issue.

Leave a Reply

Please log in using one of these methods to post your comment:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Connecting to %s

Profile

Chitlesh Goorah
Digital IC design engineer
Neuchâtel, Switzerland

Read the blog ….


This blog is featured on Sean Murphy's EDA blogger list.

Also, on a side track, I sometimes write about the success stories of opensource EDA tools on [open electrons] on edacafe.com.

Enter your email address to subscribe to this blog and receive notifications of new posts by email.

Join 27 other followers

Archives

Je touitte – I tweet

Follow

Get every new post delivered to your Inbox.

Join 27 other followers

%d bloggers like this: